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並前往https://community.intel.com/t5/FPGA-SoC-And-CPLD-Boards-And/Arria-10-HPS-DDR4-calibration-fail-and-no-emif-usr-clk/m-p/1187314?profile.language=zh-TW

Re: Arria 10 HPS DDR4 calibration fail and no emif_usr_clk

And the first stage bootloader is what runs to initialize and calibrate the external memory, so this is before uboot for Arria 10. #iwork4intel. 翻譯. 0 積分.

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