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並前往https://www3.nd.edu/~kogge/courses/cse40462-VLSI-fa18/www/Public/Lectures/StandardCell.pdf

VLSI Circuit Layout: Standard Cells Outline - University of ...

Standard Cell. – Logic gates “pre-designed”. • Power rails (Vdd and Vss) on top and bottom. • Common N and P wells. – PMOS transistors on top.

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