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並前往https://stackoverflow.com/questions/15991819/generating-single-port-rom-on-spartan-6-using-xilinx-ise-design-suite?rq=1

Generating Single Port ROM on Spartan 6 using Xilinx ISE ...

logical block 'rom1' with type 'rom' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, case mismatch ...

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