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並前往https://www.kernel.org/doc/Documentation/devicetree/bindings/arm/l2c2x0.txt

l2c2x0.txt

ARM L2 Cache Controller ARM cores often have a separate L2C210/L2C220/L2C310 (also known as PL210/PL220/ PL310 and variants) based level 2 cache controller.

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